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Silicon Labs /MGM210P032JIA /RAC_S /DIGCLKRETIMESTATUS

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Interpret as DIGCLKRETIMESTATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (use_raw_clk)DIGCLKRETIMECLKSEL 0 (lo)DIGCLKRETIMERESETNLO

DIGCLKRETIMERESETNLO=lo, DIGCLKRETIMECLKSEL=use_raw_clk

Description

No Description

Fields

DIGCLKRETIMECLKSEL

DIGCLKRETIMECLKSEL

0 (use_raw_clk): undefined

1 (use_retimed_clk): undefined
DIGCLKRETIMERESETNLO

DIGCLKRETIMERESETNLO

0 (lo): undefined

1 (hi): undefined

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data